Bleeding Edge FPGA and Digital Design: New Challenges At High Gigabit Rates

Mr. Chuck Corley
Principal Digital HW Engineer National Instruments

Cerent Engineering Science Complex, Salazar Hall 2009A
3:00 PM

Abstract – Today's ASICs and FPGAs include multi-gigabit data transceivers that operate at 28 Gigabits per second. Future 56 Gigabit per second links are being designed and will arrive soon. Problems have been encountered in making these new data links reliable. The physics of PC Board signal transmission at these rates is the next high frequency challenge for digital and signal integrity engineers. This presentation investigates these latest challenges and some of the proposed solutions.

Mr. Chuck Corley is a multi-discipline 'crossover' hardware and software engineer who enjoys the challenges of making new technologies work reliably. Some of his current engineering passions include Field Programmable Gate Arrays (FPGAs) and ultra high speed multi-gigabit digital design signal integrity. Chuck has Bachelor's and Master's degrees in Electrical and Electronic Engineering from Sacramento State University. Chuck is proud to have worked for Hewlett Packard, Agilent, Cisco, Mahi Networks, and Keithley Instruments. Currently he feels very privileged to be part of the team at National Instruments, and also teaches high speed design classes. Chuck's latest hobby is being a project lead for Engineers Without Borders, designing and building sustainable clean drinking water systems for native villages in the Amazon region of Peru.