Overview of Digital IC Design

Mr. Ryan Hirth
Technical Director Broadcom

Cerent Engineering Science Complex, Salazar Hall 2009A
4:00 PM

Abstract – An introduction into large scale digital IC design practices. This lecture will cover basic practices used to improve coding quality and design partitioning. An overview of various FIFOs, arbiters, and clock boundaries will be covered. The lecture will cover common rules-of-thumb practices to improve timing closure, verification, and testability of digital ICs.

Mr. Ryan Hirth is a Technical Director for Ethernet Access products at Broadcom. He is responsible for architecture and development of Ethernet Passive Optical Network (EPON) integrated circuits. Ryan was the Director of IC Engineer at Teknovus before the Broadcom acquisition in 2010. Ryan has developed over fifteen PON ICs. He has been a key technical contributor to the IEEE 802.3ah (1G-EPON), IEEE 802.3av (10G-EPON), and IEEE1904.1 (SIEPON) standards. Prior to Teknovus, he was ASIC Director at Terawave developing BPON ICs. He also held design engineering positions at Advanced Fibre Communication and 3Com. Ryan has B.S. in Electronic Engineering from California Polytechnic University, San Luis Obispo. Ryan has been granted 11 U.S. patents.