Abstract – Analog simulators allow complex behavior to be modeled and are a critical part of Computer-Aided-Design (CAD) tools used by designers to predict circuit performance. Early generations of simulators were inseparable from the specific transistor models integrated in their program. Resource-limited commercial simulator vendors would pair off with university and industry groups to add select models to their simulators while designers were restricted to simulators that support the models that they needed. Custom simulator interfaces were never successful as these interfaces were often quite complex – and each vendor’s interface was unique, so the effort had to be repeated for each. Model developers realized that hardware description languages (HDLs) such as Verilog, with a few changes, could provide a simple and portable way to implement complex model equations. This talk will describe how this standardized subset, Verilog-A, has changed the way “compact” transistor models are developed. We will illustrate how easy it is for anyone to create a model, not just for electrical simulation, but for any analog behavior. It is now possible – and has been demonstrated – for individual developers to invent models with as much influence on the industry as models coming from large university research groups. (Dr. Marek Mierzwinski's Slides)

Dr. Marek Mierzwinski is an R&D engineer at Keysight Technologies. He started at Hewlett Packard as a product engineer in the fab, then an R&D project manager responsible for their first modulation doped FET IC. He later moved to EEsof division and was R&D project manager for the analog circuit simulator. In 2002 he co-founded Tiburon Design Automation, which developed the industry’s first Verilog-A compiler that could be used by different commercial simulators. Marek graduated with a B.S. in Engineering Physics from Cornell and received his Masters and Ph.D. from Stanford in Electrical Engineering.