Cadence Tools in Teaching

Course Activities Cadence Products
EE 220: Electric Circuits Circuit simulation (DC analysis, transient simulation, AC analysis) Custom IC
ES 210: Digital Circuits & Logic Design Gate level simulation, Verilog/VHDL simulation Digital IC
EE 230: Electronic I Simulation of BJT, PN junction diode, MOS. Available technology: 0.18 um BiCMOS/CMOS from IBM Custom IC
EE 334: Microelectronic Circuits Integrated circuit design, noise analysis, linearity analysis, feedback analysis Custom IC
EE 430: Electromagnetic Theory and Applications Transmission line analysis, S-parameter analysis, Smith chart, microwave filters AWR and Custom IC
EE 493: Senior Design Project Entire design flow (system level analysis→ transistor level design→layout→verification(DRC, LVS, xRC) →Post-layout simulation→ Tapeout SiP and SPB
CES 522: VLSI Design System design through Verilog, transistor level design, layout Digital IC and Verification
CES 530: Analog and Digital Microelectronics Circuit simulation. Amplifier design Custom IC
CES 599: Research/thesis Thesis work Custom IC, Verification, Digital IC

 

Cadence Tools in Research

Cadence software is used by students and faculty at Sonoma State to build custom, analog, digital and mixed-signal circuits.

  • Low power operational amplifiers
  • Low power phase locked loop circuits

Disclaimer

Information is provided "as is," without waranty or guarantee of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise.

Please use this information at your own risk- and any attempt to use this information is at your own risk- we recommend using it on a copy of your data to be sure you understand what it does and under your conditions. Keep your master intact until you are personally satisfied with the use of this information within your environment.

Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.

Questions about this page? Please contact marivani at sonoma dot edu.